In recent years, integration of semiconductor chips has become denser, and the functions of semiconductor chips have become ever more advanced. Consequently, the size of semiconductor chips and the number of electrodes on the semiconductor chip have become remarkable. On the other hand, it is required for a semiconductor package to be miniaturized to meet the demand for highly efficient and miniaturized electronic devices. Under these circumstances, a semiconductor package has shifted from the QFP (Quad Flat Package) type that is a semiconductor package having leads that are arranged around the peripheral part of the package to the BGA (Ball Grid Array) type that is a semiconductor package having electrodes arranged in area array on a bottom surface and the CSP (Chip Scale Package) type that is a semiconductor package that is further miniaturized.
FIG. 10 is a cross-sectional view showing the configuration of the CSP type semiconductor package. As shown in FIG. 10, bumps 102 are formed on electrodes formed on a semiconductor chip 101, the semiconductor chip 101 having connected to electrodes 104 formed on a wiring substrate 105 with face down via conductive resin 103. Further, sealing resin 107 is filled between the semiconductor chip 101 and the wiring substrate 105 to ensure the air-tightness. In FIG. 10, numeral 106 indicates an external lead electrode.
When the CSP type semiconductor package is used, an area of a circuit board can be utilized efficiently by miniaturizing the package. Thereby the package can be suitable for high speed and low noise circuits.
However, the above-mentioned conventional CSP type semiconductor package has the following problems. That is, when reliability such as thermal shock is evaluated, a sealing part between a semiconductor chip and a wiring substrate is prone to the cracking, because the thermal expansion coefficient of the semiconductor chip and that of the wiring substrate are different, and as a result, the air-tightness might deteriorate. Further, the cost and the number of steps of manufacturing may be increased by performing a process for sealing resin and coating. Further, the thermal conductivity between the semiconductor chip and the wiring substrate is very poor and it is very difficult for heat that is generated in the semiconductor chip to be released.